Messages in this thread | | | Date | Fri, 5 Feb 2016 14:02:59 +0100 | From | Thomas Petazzoni <> | Subject | Re: [PATCH v10 5/5] Watchdog: ARM SBSA Generic Watchdog half timeout panic support |
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Hello,
On Fri, 5 Feb 2016 17:51:52 +0800, Fu Wei wrote:
> OK, my thought is > > if panic is enabled : > |--------WOR-------WS0--------WOR-------WS1 > |------timeout------(panic)------timeout-----reset
I'm quite certainly missing something completely obvious here, but how can you get the WS1 interrupt *after* raising a panic? Aren't all interrupts disabled and the system fully halted once you get a panic(), especially when raised from an interrupt handler? If that's the case, how can the system continue to do things, such as receiving the WS1 interrupt and resetting ?
Again, I'm probably missing something obvious, but I'm interested to understand the reasoning here.
Thanks!
Thomas -- Thomas Petazzoni, CTO, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
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