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SubjectRe: [PATCH v5 21/23] powerpc: Simplify test in __dma_sync()
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On 2/4/16, Christophe Leroy <christophe.leroy@c-s.fr> wrote:
> This simplification helps the compiler. We now have only one test
> instead of two, so it reduces the number of branches.
>
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
> ---
> v2: new
> v3: no change
> v4: no change
> v5: no change
>
> arch/powerpc/mm/dma-noncoherent.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/mm/dma-noncoherent.c
> b/arch/powerpc/mm/dma-noncoherent.c
> index 169aba4..2dc74e5 100644
> --- a/arch/powerpc/mm/dma-noncoherent.c
> +++ b/arch/powerpc/mm/dma-noncoherent.c
> @@ -327,7 +327,7 @@ void __dma_sync(void *vaddr, size_t size, int direction)
> * invalidate only when cache-line aligned otherwise there is
> * the potential for discarding uncommitted data from the cache
> */
> - if ((start & (L1_CACHE_BYTES - 1)) || (size & (L1_CACHE_BYTES - 1)))
> + if ((start | end) & (L1_CACHE_BYTES - 1))
> flush_dcache_range(start, end);
> else
> invalidate_dcache_range(start, end);
The previous version of address cache-line aligned check reads perfectly fine.
What's the benefit of this micro optimization?
> --
> 2.1.0
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev

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