Messages in this thread | | | From | Hau <> | Subject | RE: [PATCH net v4] r8169:fix "rtl_counters_cond == 1 (loop: 1000, delay: 10)" log spam. | Date | Thu, 25 Feb 2016 05:48:58 +0000 |
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> Fine with me. > > Is there any chance for the set of chipset dependent registers that are safe to > be read when in D3 state to be documented ? >
I think except registers in PCI configuration, all other registers should be read in D0 state.
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