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SubjectRe: [PATCHv2] clk: socfpga: allow for multiple parents on Arria10 periph clocks
On 02/22, dinguyen@opensource.altera.com wrote:
> From: Dinh Nguyen <dinguyen@opensource.altera.com>
>
> There are some Arria10 clocks of type "altr,socfpga-a10-perip-clk" that can
> have multiple parents. Fix up the __socfpga_periph_init() to call
> of_clk_parent_fill() that will return the appropriate number of parents.
>
> Also, update __socfpga_gate_init() to call of_clk_parent_fill() helper
> function.
>
> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
> ---

Applied to clk-next

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