Messages in this thread | | | Date | Thu, 11 Feb 2016 12:27:58 +0100 | From | Borislav Petkov <> | Subject | Re: [PATCHv10 2/4] ARM: dts: Add Altera L2 Cache and OCRAM EDAC entries |
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On Wed, Feb 10, 2016 at 01:26:22PM -0600, tthayer@opensource.altera.com wrote: > From: Thor Thayer <tthayer@opensource.altera.com> > > Adding the device tree entries and bindings needed to support > the Altera L2 cache and On-Chip RAM EDAC. This patch relies upon > an earlier patch to declare and setup On-chip RAM properly. > http://www.spinics.net/lists/devicetree/msg51117.html
For the future, please use git commit IDs and not some, probably unstable URLs:
8b907c8b62ac ("arm: dts: socfpga: Add OCRAM node")
I've fixed it now while applying.
-- Regards/Gruss, Boris.
ECO tip #101: Trim your mails when you reply.
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