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SubjectRE: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze
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> On Tue, Feb 09, 2016 at 04:11:56PM +0530, Bharat Kumar Gogada wrote:
> > Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both
> > Zynq and Microblaze Architectures.
> > With these modifications drivers/pci/host/pcie-xilinx.c, will work on
> > both Zynq and Microblaze Architectures.
> >
> > Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
> > Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
> > ---
> > Changes:
> > Removed unneccessary architecture dependent number of MSI's.
> > Added #ifdef to pci_fixup_irqs which is ARM specific API.
>
> Hi Bharat,
>
> Why do you say pci_fixup_irqs is ARM-specific? It's declared in
> include/linux/pci.h, defined in drivers/pci/setup-irq.c & used by multiple
> architectures (alpha, arm, m68k, mips, sh, sparc, tile,
> unicore32 from a quick grep).
>
> Will you not break INTX-style interrupts by removing this?
>
I meant to say ARM specific w.r.t Microblaze architecture, which is what this patch series are for. This has been already discussed in my previous patch by Arnd Bergmann and Lorenzo Pieralisi . (https://lkml.org/lkml/2016/1/12/707)

Bharat
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