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SubjectRe: [PATCH v4 2/6] clk: qcom: ipq4019: Add the apss cpu pll divider clock node
On 11/25, Abhishek Sahu wrote:
> The current ipq4019 clock driver does not have support for all
> the frequency supported by APSS CPU. APSS CPU frequency is
> provided with APSS CPU PLL divider which divides down the VCO
> frequency. This divider is nonlinear and specific to IPQ4019
> so the standard divider code cannot be used for this.
>
> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
> ---

Applied to clk-ipq4019 and merged into clk-next.

--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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