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    Subject[RFC PATCH v3 03/20] x86: Add the Secure Memory Encryption cpu feature
    Date
    Update the cpu features to include identifying and reporting on the
    Secure Memory Encryption feature.

    Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
    ---
    arch/x86/include/asm/cpufeatures.h | 1 +
    arch/x86/kernel/cpu/scattered.c | 1 +
    2 files changed, 2 insertions(+)

    diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
    index b212b86..f083ea1 100644
    --- a/arch/x86/include/asm/cpufeatures.h
    +++ b/arch/x86/include/asm/cpufeatures.h
    @@ -187,6 +187,7 @@
    * Reuse free bits when adding new feature flags!
    */

    +#define X86_FEATURE_SME ( 7*32+ 0) /* AMD Secure Memory Encryption */
    #define X86_FEATURE_CPB ( 7*32+ 2) /* AMD Core Performance Boost */
    #define X86_FEATURE_EPB ( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */

    diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
    index 8cb57df..d86d9a5 100644
    --- a/arch/x86/kernel/cpu/scattered.c
    +++ b/arch/x86/kernel/cpu/scattered.c
    @@ -37,6 +37,7 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
    { X86_FEATURE_HW_PSTATE, CR_EDX, 7, 0x80000007, 0 },
    { X86_FEATURE_CPB, CR_EDX, 9, 0x80000007, 0 },
    { X86_FEATURE_PROC_FEEDBACK, CR_EDX,11, 0x80000007, 0 },
    + { X86_FEATURE_SME, CR_EAX, 0, 0x8000001f, 0 },
    { 0, 0, 0, 0, 0 }
    };

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