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SubjectRe: [PATCH v10 6/7] x86/arch_prctl: Add ARCH_[GET|SET]_CPUID
On Tue, 8 Nov 2016, Kyle Huey wrote:
> Intel supports faulting on the CPUID instruction beginning with Ivy Bridge.
> When enabled, the processor will fault on attempts to execute the CPUID
> instruction with CPL>0. Exposing this feature to userspace will allow a
> ptracer to trap and emulate the CPUID instruction.
>
> When supported, this feature is controlled by toggling bit 0 of
> MSR_MISC_FEATURES_ENABLES. It is documented in detail in Section 2.3.2 of
> http://www.intel.com/content/dam/www/public/us/en/documents/application-notes/virtualization-technology-flexmigration-application-note.pdf

See previous mail.

> +DECLARE_PER_CPU(u64, msr_misc_features_enables_shadow);
> +
> diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
> index 97a340d..7d364e4 100644
> --- a/arch/x86/kernel/cpu/scattered.c
> +++ b/arch/x86/kernel/cpu/scattered.c
> @@ -71,9 +71,14 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
> }
>
> for (mb = msr_bits; mb->feature; mb++) {
> if (rdmsrl_safe(mb->msr, &msrval))
> continue;
> if (msrval & (1ULL << mb->bit))
> set_cpu_cap(c, mb->feature);
> }
> +
> + if (cpu_has(c, X86_FEATURE_CPUID_FAULT)) {
> + rdmsrl(MSR_MISC_FEATURES_ENABLES, msrval);
> + this_cpu_write(msr_misc_features_enables_shadow, msrval);
> + }

I'm not really happy about this placement. There is more stuff coming up
which affects that MSR, so we should have a central place to handle it.

The most obvious is here:

> +DEFINE_PER_CPU(u64, msr_misc_features_enables_shadow);

void msr_misc_features_enable_init(struct cpuinfo_x86 *c)
{
u64 val;

if (rdmsrl_safe(MSR_MISC_FEATURES_ENABLES, val))
return;

this_cpu_write(msr_misc_features_enables_shadow, val);
}

The upcoming ring3 mwait stuff can add its magic to tweak that MSR into
this function.

Stick the call at the end of init_scattered_cpuid_features() for now. I
still need to figure out a proper place for it.

> +static int set_cpuid_mode(struct task_struct *task, unsigned long val)
> +{
> + /* Only disable_cpuid() if it is supported on this hardware. */

That comment makes no sense.

> + if (!static_cpu_has(X86_FEATURE_CPUID_FAULT))
> + return -ENODEV;

Thanks,

tglx

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