Messages in this thread | | | From | Kyle Huey <> | Date | Tue, 8 Nov 2016 10:00:18 -0800 | Subject | Re: [PATCH v9 7/7] KVM: x86: virtualize cpuid faulting |
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On Tue, Nov 8, 2016 at 9:53 AM, Thomas Gleixner <tglx@linutronix.de> wrote: > On Tue, 8 Nov 2016, Kyle Huey wrote: >> > It will simplify the MSR get/set code, and make it easier to plumb >> > support for new bits in these MSRs. >> >> I'm inclined to do this for MSR_PLATFORM_INFO but not >> MSR_MISC_FEATURES_ENABLES. The former actually has other bits, and >> isn't used outside the msr handling code (yet, anyways). >> MSR_MISC_FEATURES_ENABLES doesn't have any other bits (it's actually >> not documented by Intel at all outside of that virtualization paper) >> and after masking bits in cpuid.c or adding a helper function the >> complexity would be a wash at best. > > The feature MSR is also used for enabling ring3 MWAIT, which is obviously > not documented either. So there is more stuff coming along.... > > Thanks, > > tglx >
Bah :) Ok.
- Kyle
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