Messages in this thread | | | Date | Mon, 7 Nov 2016 15:07:46 +0100 | From | Ingo Molnar <> | Subject | Re: [PATCH v3 1/2] x86/AMD: Fix cpu_llc_id for AMD Fam17h systems |
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* Borislav Petkov <bp@suse.de> wrote:
> On Mon, Nov 07, 2016 at 08:31:21AM +0100, Ingo Molnar wrote: > > > cpu_llc_id (Last Level Cache ID) derivation on AMD Fam17h has an > > > underflow bug when extracting the socket_id value. It starts from 0 > > How's this... > > > > so subtracting 1 from it will result in an invalid value. This breaks > > > scheduling topology later on since the cpu_llc_id will be incorrect. > ^^^^^^^^^^^^^^^^^^^ > ... here? > > > Same question as for the previous patch: what are the effects of the bug: > > See above.
There's many ways the scheduling topology can 'break', resulting in different effects:
- scheduling domains might be mixed up to the extent of crashing the bootup
- some cores might be missing altogether, reducing available CPUs in essence
- cache domains might be seriously mixed up, resulting in serious drop in performance.
- or domains might be partitioned 'wrong' but not catastrophically wrong, resulting in a minor performance drop (if at all)
... do we know which of these occurs in this situation?
Thanks,
Ingo
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