Messages in this thread | | | Date | Thu, 3 Nov 2016 13:05:50 -0700 | From | 'Stephen Boyd' <> | Subject | Re: [PATCH 1/3] clk: qcom: gdsc: Add support for gdscs with HW control |
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On 11/03, Sricharan wrote: > Ok, so the video ip core, has a hw control signal/bit. > I checked this by dumping this out that, the moment the > gdsc is put to hw control, the video ip's hw control bit also > gets asserted/set. so this means that video ip's bit get > aligned with the gdsc setting. so this should avoid the > glitches, right ? >
Yes that matches my understanding. Thanks for confirming.
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