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    SubjectRe: [PATCH 2/9] ARC: timer: rtc: implement read loop in "C" vs. inline asm
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    On 11/03/2016 10:02 AM, Daniel Lezcano wrote:
    > On Mon, Oct 31, 2016 at 03:48:09PM -0700, Vineet Gupta wrote:
    >> To allow for easy movement into drivers/clocksource
    >>
    >> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
    >> ---
    >> arch/arc/kernel/time.c | 13 +++++--------
    >> 1 file changed, 5 insertions(+), 8 deletions(-)
    >>
    >> diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
    >> index a2db010cde18..2c51e3cafad0 100644
    >> --- a/arch/arc/kernel/time.c
    >> +++ b/arch/arc/kernel/time.c
    >> @@ -153,14 +153,11 @@ static cycle_t arc_read_rtc(struct clocksource *cs)
    >> cycle_t full;
    >> } stamp;
    >>
    >> -
    >> - __asm__ __volatile(
    >> - "1: \n"
    >> - " lr %0, [AUX_RTC_LOW] \n"
    >> - " lr %1, [AUX_RTC_HIGH] \n"
    >> - " lr %2, [AUX_RTC_CTRL] \n"
    >> - " bbit0.nt %2, 31, 1b \n"
    >> - : "=r" (stamp.low), "=r" (stamp.high), "=r" (status));
    >> + do {
    >> + stamp.low = read_aux_reg(AUX_RTC_LOW);
    >> + stamp.high = read_aux_reg(AUX_RTC_HIGH);
    >> + status = read_aux_reg(AUX_RTC_CTRL);
    >> + } while (!(status & 0x80000000UL));
    >
    > Replace the literal 0x80000000UL by a macro.

    OK !


    > What is the 'status' for ?

    Hardware keeps a internal state machine for atomic readout of low/high. So if an
    interrupt is taken between reading low and high, or if high increments after low
    is read, then the bit forces a loop to retry.

    >
    >> return stamp.full;
    >> }
    >> --
    >> 2.7.4
    >>

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