Messages in this thread | | | From | "Tan, Jui Nee" <> | Subject | RE: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's | Date | Mon, 21 Nov 2016 03:52:41 +0000 |
| |
> -----Original Message----- > From: Andy Shevchenko [mailto:andriy.shevchenko@linux.intel.com] > Sent: Friday, November 18, 2016 7:22 PM > To: Tan, Jui Nee <jui.nee.tan@intel.com>; mika.westerberg@linux.intel.com; > heikki.krogerus@linux.intel.com; tglx@linutronix.de; dvhart@infradead.org; > mingo@redhat.com; hpa@zytor.com; x86@kernel.org; ptyser@xes-inc.com; > lee.jones@linaro.org; linus.walleij@linaro.org > Cc: linux-gpio@vger.kernel.org; platform-driver-x86@vger.kernel.org; > linux-kernel@vger.kernel.org; Yong, Jonathan <jonathan.yong@intel.com>; > Yu, Ong Hock <ong.hock.yu@intel.com>; Luck, Tony <tony.luck@intel.com>; > Wan Mohamad, Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>; > Sun, Yunying <yunying.sun@intel.com> > Subject: Re: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to > Sideband bridge support driver for Intel SOC's > > On Fri, 2016-11-18 at 13:22 +0800, Tan Jui Nee wrote: > > From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > > > > There is already one and at least one more user coming which require > > an access to Primary to Sideband bridge (P2SB) in order to get IO or > > MMIO bar hidden by BIOS. > > Create a driver to access P2SB for x86 devices. > > > > Signed-off-by: Yong, Jonathan <jonathan.yong@intel.com> > > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > > --- > > Changes in V11: > > - No change > > Any particular reason you ignored my comments to v10 of this patch? > Hi Andy, I am sorry for missing your comments as the email filtered into other folder and I was not aware of that. I will applied your comments into next patch version.
> -- > Andy Shevchenko <andriy.shevchenko@linux.intel.com> > Intel Finland Oy
| |