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    Subject[PATCH v8 7/7] KVM: x86: virtualize cpuid faulting
    Date
    Hardware support for faulting on the cpuid instruction is not required to
    emulate it, because cpuid triggers a VM exit anyways. KVM handles the relevant
    MSRs (MSR_PLATFORM_INFO and MSR_MISC_FEATURES_ENABLE) and upon a
    cpuid-induced VM exit checks the cpuid faulting state and the CPL.
    kvm_require_cpl is even kind enough to inject the GP fault for us.

    Signed-off-by: Kyle Huey <khuey@kylehuey.com>
    ---
    arch/x86/include/asm/kvm_host.h | 1 +
    arch/x86/kvm/cpuid.c | 3 +++
    arch/x86/kvm/x86.c | 16 ++++++++++++++++
    3 files changed, 20 insertions(+)

    diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
    index 4b20f73..4a6e62b 100644
    --- a/arch/x86/include/asm/kvm_host.h
    +++ b/arch/x86/include/asm/kvm_host.h
    @@ -592,16 +592,17 @@ struct kvm_vcpu_arch {
    u64 pat;

    unsigned switch_db_regs;
    unsigned long db[KVM_NR_DB_REGS];
    unsigned long dr6;
    unsigned long dr7;
    unsigned long eff_db[KVM_NR_DB_REGS];
    unsigned long guest_debug_dr7;
    + bool cpuid_fault;

    u64 mcg_cap;
    u64 mcg_status;
    u64 mcg_ctl;
    u64 mcg_ext_ctl;
    u64 *mce_banks;

    /* Cache MMIO info */
    diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
    index afa7bbb..ed8436a 100644
    --- a/arch/x86/kvm/cpuid.c
    +++ b/arch/x86/kvm/cpuid.c
    @@ -862,16 +862,19 @@ void kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
    trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx);
    }
    EXPORT_SYMBOL_GPL(kvm_cpuid);

    void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
    {
    u32 function, eax, ebx, ecx, edx;

    + if (vcpu->arch.cpuid_fault && !kvm_require_cpl(vcpu, 0))
    + return;
    +
    function = eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
    ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
    kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx);
    kvm_register_write(vcpu, VCPU_REGS_RAX, eax);
    kvm_register_write(vcpu, VCPU_REGS_RBX, ebx);
    kvm_register_write(vcpu, VCPU_REGS_RCX, ecx);
    kvm_register_write(vcpu, VCPU_REGS_RDX, edx);
    kvm_x86_ops->skip_emulated_instruction(vcpu);
    diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
    index e375235..470c553 100644
    --- a/arch/x86/kvm/x86.c
    +++ b/arch/x86/kvm/x86.c
    @@ -2269,16 +2269,21 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
    return 1;
    vcpu->arch.osvw.length = data;
    break;
    case MSR_AMD64_OSVW_STATUS:
    if (!guest_cpuid_has_osvw(vcpu))
    return 1;
    vcpu->arch.osvw.status = data;
    break;
    + case MSR_MISC_FEATURES_ENABLES:
    + if (data & ~CPUID_FAULT_ENABLE)
    + return 1;
    + vcpu->arch.cpuid_fault = !!(data & CPUID_FAULT_ENABLE);
    + break;
    default:
    if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
    return xen_hvm_config(vcpu, data);
    if (kvm_pmu_is_valid_msr(vcpu, msr))
    return kvm_pmu_set_msr(vcpu, msr_info);
    if (!ignore_msrs) {
    vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
    msr, data);
    @@ -2483,16 +2488,25 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
    return 1;
    msr_info->data = vcpu->arch.osvw.length;
    break;
    case MSR_AMD64_OSVW_STATUS:
    if (!guest_cpuid_has_osvw(vcpu))
    return 1;
    msr_info->data = vcpu->arch.osvw.status;
    break;
    + case MSR_PLATFORM_INFO:
    + /* cpuid faulting is supported */
    + msr_info->data = PLATINFO_CPUID_FAULT;
    + break;
    + case MSR_MISC_FEATURES_ENABLES:
    + msr_info->data = 0;
    + if (vcpu->arch.cpuid_fault)
    + msr_info->data |= CPUID_FAULT_ENABLE;
    + break;
    default:
    if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
    return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
    if (!ignore_msrs) {
    vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
    return 1;
    } else {
    vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
    @@ -7493,16 +7507,18 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
    kvm_update_dr0123(vcpu);
    vcpu->arch.dr6 = DR6_INIT;
    kvm_update_dr6(vcpu);
    vcpu->arch.dr7 = DR7_FIXED_1;
    kvm_update_dr7(vcpu);

    vcpu->arch.cr2 = 0;

    + vcpu->arch.cpuid_fault = false;
    +
    kvm_make_request(KVM_REQ_EVENT, vcpu);
    vcpu->arch.apf.msr_val = 0;
    vcpu->arch.st.msr_val = 0;

    kvmclock_reset(vcpu);

    kvm_clear_async_pf_completion_queue(vcpu);
    kvm_async_pf_hash_reset(vcpu);
    --
    2.10.2
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