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    Subject[PATCH 4.4 095/112] irqchip/gic-v3-its: Fix entry size mask for GITS_BASER
    Date
    4.4-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Vladimir Murzin <vladimir.murzin@arm.com>

    commit 9224eb77e63f70f16c0b6b7a20ca7d395f3bc077 upstream.

    Entry Size in GITS_BASER<n> occupies 5 bits [52:48], but we mask out 8
    bits.

    Fixes: cc2d3216f53c ("irqchip: GICv3: ITS command queue")
    Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
    Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>


    ---
    include/linux/irqchip/arm-gic-v3.h | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    --- a/include/linux/irqchip/arm-gic-v3.h
    +++ b/include/linux/irqchip/arm-gic-v3.h
    @@ -218,7 +218,7 @@
    #define GITS_BASER_TYPE_SHIFT (56)
    #define GITS_BASER_TYPE(r) (((r) >> GITS_BASER_TYPE_SHIFT) & 7)
    #define GITS_BASER_ENTRY_SIZE_SHIFT (48)
    -#define GITS_BASER_ENTRY_SIZE(r) ((((r) >> GITS_BASER_ENTRY_SIZE_SHIFT) & 0xff) + 1)
    +#define GITS_BASER_ENTRY_SIZE(r) ((((r) >> GITS_BASER_ENTRY_SIZE_SHIFT) & 0x1f) + 1)
    #define GITS_BASER_NonShareable (0UL << 10)
    #define GITS_BASER_InnerShareable (1UL << 10)
    #define GITS_BASER_OuterShareable (2UL << 10)

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