Messages in this thread | | | Date | Wed, 12 Oct 2016 12:32:04 +0200 | From | Borislav Petkov <> | Subject | Re: [PATCH v1 4/4] Add R3MWAIT to CPU features |
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On Wed, Oct 12, 2016 at 12:13:10PM +0200, Grzegorz Andrejczuk wrote: > Add cpu feature for ring 3 monitor/mwait. > > Change-Id: Iba4d20639efd8d3637d37db9294cbc43a98f009a
Please no internal IDs in upstream submission.
> Signed-off-by: Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com>
...
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index 92a8308..242cd16 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -12,7 +12,7 @@ > /* > * Defines x86 CPU feature bits > */ > -#define NCAPINTS 18 /* N 32-bit words worth of info */ > +#define NCAPINTS 19 /* N 32-bit words worth of info */ > #define NBUGINTS 1 /* N 32-bit bug flags */ > > /* > @@ -286,6 +286,10 @@ > #define X86_FEATURE_SUCCOR (17*32+1) /* Uncorrectable error containment and recovery */ > #define X86_FEATURE_SMCA (17*32+3) /* Scalable MCA */ > > + > +/* non architectural Intel-defined CPU features not present in CPUID, word 18 */ > +#define X86_FEATURE_PHIR3MWAIT (18*32+ 0)
Please use init_scattered_cpuid_features() for the whole thing. There are some free bits in word 3 for example, see arch/x86/include/asm/cpufeatures.h.
-- Regards/Gruss, Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg) --
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