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SubjectRe: [PATCH v2 3/9] clk: rockchip: add clock controller for rk3036
On 2015年09月24日 11:04, Xing Zheng wrote:
>>>
>>> #define RK3066_PLL_RATE(_rate, _nr, _nf, _no) \
>>> @@ -95,12 +106,31 @@ enum rockchip_pll_type {
>>> .nb = _nb, \
>>> }
>>>
>>> +#define RK3036_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1, \
>>> + _postdiv2, _dsmpd, _frac) \
>>> +{ \
>>> + .rate = _rate##U, \
>>> + .fbdiv = _fbdiv, \
>>> + .postdiv1 = _postdiv1, \
>>> + .refdiv = _refdiv, \
>>> + .postdiv2 = _postdiv2, \
>>> + .dsmpd = _dsmpd, \
>>> + .frac = _frac, \
>>> +}
>>> +
>>> struct rockchip_pll_rate_table {
>>> unsigned long rate;
>>> unsigned int nr;
>>> unsigned int nf;
>>> unsigned int no;
>>> unsigned int nb;
>>> + /* for RK3036 */
>>> + unsigned int fbdiv;
>>> + unsigned int postdiv1;
>>> + unsigned int refdiv;
>>> + unsigned int postdiv2;
>>> + unsigned int dsmpd;
>>> + unsigned int frac;
>> same for these 2 ... should be part of the pll addition itself
> };
> Done.
>
Sorry, I have one question:
The "struct rockchip_pll_rate_table" is called in "rockchip/clk-pll.c"
on many functions, I think I could add a struct like:
struct rk3036_pll_rate_table {
unsigned int fbdiv;
unsigned int postdiv1;
unsigned int refdiv;
unsigned int postdiv2;
unsigned int dsmpd;
unsigned int frac;
};
but, it will add many redundancy codes in "rockchip/clk-pll.c" just for
call "struct rk3036_pll_rate_table".

Thanks.




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