Messages in this thread | | | Subject | Re: [PATCH 1/2] dt-bindings: Fix tipo in st,clkgen-pll documentation | From | Rob Herring <> | Date | Mon, 21 Sep 2015 10:04:34 -0500 |
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On 09/16/2015 02:42 AM, Gabriel Fernandez wrote: > replace "sst,plls-c32-cx_x" by "st,plls-c32-cx_x"
Ironically, the subject has a typo...
Acked-by: Rob Herring <robh@kernel.org>
> > Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> > --- > Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt b/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt > index d8b168e..e2c6db0 100644 > --- a/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt > +++ b/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt > @@ -21,8 +21,8 @@ Required properties: > "st,stih416-plls-c32-ddr", "st,clkgen-plls-c32" > "st,stih407-plls-c32-a0", "st,clkgen-plls-c32" > "st,stih407-plls-c32-a9", "st,clkgen-plls-c32" > - "sst,plls-c32-cx_0", "st,clkgen-plls-c32" > - "sst,plls-c32-cx_1", "st,clkgen-plls-c32" > + "st,plls-c32-cx_0", "st,clkgen-plls-c32" > + "st,plls-c32-cx_1", "st,clkgen-plls-c32" > > "st,stih415-gpu-pll-c32", "st,clkgengpu-pll-c32" > "st,stih416-gpu-pll-c32", "st,clkgengpu-pll-c32" >
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