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    Subject[PATCH 3.4 035/146] MIPS: Hibernate: flush TLB entries earlier
    Date
    From: Huacai Chen <chenhc@lemote.com>

    3.4.109-rc1 review patch. If anyone has any objections, please let me know.

    ------------------


    commit a843d00d038b11267279e3b5388222320f9ddc1d upstream.

    We found that TLB mismatch not only happens after kernel resume, but
    also happens during snapshot restore. So move it to the beginning of
    swsusp_arch_suspend().

    Signed-off-by: Huacai Chen <chenhc@lemote.com>
    Cc: Steven J. Hill <Steven.Hill@imgtec.com>
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang <zhangfx@lemote.com>
    Cc: Zhangjin Wu <wuzhangjin@gmail.com>
    Patchwork: https://patchwork.linux-mips.org/patch/9621/
    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
    Signed-off-by: Zefan Li <lizefan@huawei.com>
    ---
    arch/mips/power/hibernate.S | 3 ++-
    1 file changed, 2 insertions(+), 1 deletion(-)

    diff --git a/arch/mips/power/hibernate.S b/arch/mips/power/hibernate.S
    index 5bf34ec..2ca1735 100644
    --- a/arch/mips/power/hibernate.S
    +++ b/arch/mips/power/hibernate.S
    @@ -31,6 +31,8 @@ LEAF(swsusp_arch_suspend)
    END(swsusp_arch_suspend)

    LEAF(swsusp_arch_resume)
    + /* Avoid TLB mismatch during and after kernel resume */
    + jal local_flush_tlb_all
    PTR_L t0, restore_pblist
    0:
    PTR_L t1, PBE_ADDRESS(t0) /* source */
    @@ -44,7 +46,6 @@ LEAF(swsusp_arch_resume)
    bne t1, t3, 1b
    PTR_L t0, PBE_NEXT(t0)
    bnez t0, 0b
    - jal local_flush_tlb_all /* Avoid TLB mismatch after kernel resume */
    PTR_LA t0, saved_regs
    PTR_L ra, PT_R31(t0)
    PTR_L sp, PT_R29(t0)
    --
    1.9.1


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