Messages in this thread | | | Subject | Re: [RFCv3 1/4] docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings. | From | Philipp Zabel <> | Date | Tue, 04 Aug 2015 17:10:17 +0200 |
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Hi Moritz,
Am Dienstag, den 04.08.2015, 08:05 -0700 schrieb Moritz Fischer: > Hi Philip, > > On Tue, Aug 4, 2015 at 1:09 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote: > > Hi Moritz, > > > > Am Donnerstag, den 30.07.2015, 18:13 -0700 schrieb Moritz Fischer: [...] > >> +Required properties: > >> +- compatible: "xlnx,zynq-reset" > >> +- reg: SLCR offset and size taken via syscon <0x200 0x48> > >> +- syscon: <&slcr> > >> + This should be a phandle to the Zynq's SLCR register. > > > > ^ register singular? > Do you want me to resend the entire set, or are you cool with just git > amending the 's' for registers?
Amended and applied, thanks.
regards Philipp
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