Messages in this thread Patch in this message | | | From | Jiang Liu <> | Subject | [Bugfix] x86, irq: Fix an error in building CPU vector to IRQ number mapping for MSI | Date | Tue, 18 Aug 2015 23:20:20 +0800 |
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Alex Deucher, Mark Rustad and Alexander Holler reported a regression with the latest v4.2-rc4 kernel, which breaks some SATA controllers. With multi-MSI capable SATA controllers, only the first port works, all other ports times out when executing SATA commands.
The regression is caused by b5dc8e6c21e7 ("x86/irq: Use hierarchical irqdomain to manage CPU interrupt vectors"), which builds wrong CPU vector to IRQ number mappings for second and subsequent IRQs of multiple MSIs and causes that all MSI IRQs are handled as the first MSI IRQ. So fix the regression by building correct CPU vector to IRQ number mappings for multiple MSIs.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Reported-and-tested-by: Alex Deucher <alexdeucher@gmail.com> Reported-and-tested-by: Mark Rustad <mrustad@gmail.com> Reported-and-tested-by: Alexander Holler <holler@ahsoftware.de> --- arch/x86/kernel/apic/vector.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c index f813261d9740..2683f36e4e0a 100644 --- a/arch/x86/kernel/apic/vector.c +++ b/arch/x86/kernel/apic/vector.c @@ -322,7 +322,7 @@ static int x86_vector_alloc_irqs(struct irq_domain *domain, unsigned int virq, irq_data->chip = &lapic_controller; irq_data->chip_data = data; irq_data->hwirq = virq + i; - err = assign_irq_vector_policy(virq, irq_data->node, data, + err = assign_irq_vector_policy(virq + i, irq_data->node, data, info); if (err) goto error; -- 1.7.10.4
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