Messages in this thread | | | Date | Tue, 28 Jul 2015 11:22:20 +0100 | From | Sudeep Holla <> | Subject | Re: [PATCH v5 1/8] Documentation: add DT binding for ARM System Control and Power Interface(SCPI) protocol |
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Hi Mark,
On 23/07/15 12:10, Sudeep Holla wrote: > This patch adds devicetree binding for System Control and Power > Interface (SCPI) Message Protocol used between the Application Cores(AP) > and the System Control Processor(SCP). The MHU peripheral provides a > mechanism for inter-processor communication between SCP's M3 processor > and AP. > > SCP offers control and management of the core/cluster power states, > various power domain DVFS including the core/cluster, certain system > clocks configuration, thermal sensors and many others. > > Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Mark Rutland <mark.rutland@arm.com>
Can you review or provide ACK if this looks good ?
[..]
> diff --git a/Documentation/devicetree/bindings/arm/arm,scpi.txt b/Documentation/devicetree/bindings/arm/arm,scpi.txt > new file mode 100644 > index 000000000000..e21cce646561 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/arm,scpi.txt > @@ -0,0 +1,151 @@
[..]
> +cpu@0 { > + ... > + reg = <0 0>; > + clocks = <&scpi_dvfs 0>; > +}; > + > +hdlcd@7ff60000 { > + ... > + reg = <0 0x7ff60000 0 0x1000>; > + clocks = <&scpi_clk 4>; > +}; > + > +In the above example, the #clock-cells is set to 1 as required. > +scpi_dvfs has 3 output clocks namely: vbig, vlittle and vgpu with 0, 1
I noticed this just after sending it out, fixed now to match the names in the example correctly.
Regards, Sudeep
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