lkml.org 
[lkml]   [2015]   [Jul]   [28]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    SubjectRe: [RFCv2 1/3] docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
    From
    Hi Michal,

    On Sun, Jul 26, 2015 at 10:09 PM, Michal Simek <monstr@monstr.eu> wrote:
    > On 07/25/2015 02:21 AM, Moritz Fischer wrote:
    >> Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
    >> ---
    >> Documentation/devicetree/bindings/reset/zynq-reset-pl.txt | 13 +++++++++++++
    >> 1 file changed, 13 insertions(+)
    >> create mode 100644 Documentation/devicetree/bindings/reset/zynq-reset-pl.txt
    >>
    >> diff --git a/Documentation/devicetree/bindings/reset/zynq-reset-pl.txt b/Documentation/devicetree/bindings/reset/zynq-reset-pl.txt
    >> new file mode 100644
    >> index 0000000..ac4499e
    >> --- /dev/null
    >> +++ b/Documentation/devicetree/bindings/reset/zynq-reset-pl.txt
    >> @@ -0,0 +1,13 @@
    >> +Xilinx Zynq PL Reset Manager
    >
    > here
    >
    >> +
    >> +Required properties:
    >> +- compatible: "xlnx,zynq-reset-pl"
    >
    > Currently it is not just PL reset controller.
    >
    >> +- syscon <&slcr>;
    >
    >
    > missing : and please be more descriptive here.
    >
    >> +- #reset-cells: 1
    >> +
    >> +Example:
    >> + rstc: rstc@240 {
    >> + #reset-cells = <1>;
    >> + compatible = "xlnx,zynq-reset-pl";
    >
    > Compatible property should go first.
    >
    > I am missing that reg property
    >
    >> + syscon = <&slcr>;
    >> + };
    >>
    >
    Would something like this work:

    Xilinx Zynq Reset Manager

    The Zynq AP-SoC has several different resets.

    See Chapter 26 of the Zynq TRM (UG585) for more information about Zynq resets.

    Required properties:
    - compatible: "xlnx,zynq-reset"
    - reg: SLCR offset and size taken via syscon <0x200 0x50>
    - syscon: <&slcr>
    This should be a phandle to the Zynq's SLCR register.
    - #reset-cells: Must be 1

    The Zynq Reset Manager needs to be a child node of the SLCR.

    Example:
    rstc: rstc@200 {
    compatible = "xlnx,zynq-reset";
    reg = <0x200 0x50>;
    #reset-cells = <1>;
    syscon = <&slcr>;
    };

    > Thanks,
    > Michal
    >
    >
    > --
    > Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
    > w: www.monstr.eu p: +42-0-721842854
    > Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
    > Maintainer of Linux kernel - Xilinx Zynq ARM architecture
    > Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
    >
    >

    Thanks for your feedback,

    Moritz


    \
     
     \ /
      Last update: 2015-07-28 07:41    [W:3.224 / U:0.240 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site