Messages in this thread |  | | Date | Fri, 17 Jul 2015 14:18:28 -0700 | | From | Andi Kleen <> | | Subject | Re: [PATCH 3/3] x86, perf: Add PEBS frontend profiling for Skylake |
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On Fri, Jul 17, 2015 at 11:05:37PM +0200, Peter Zijlstra wrote: > On Fri, Jul 17, 2015 at 10:52:33PM +0200, Andi Kleen wrote: > > > > I don't think the code is the right place to document such registers. > > If the code deviates from the SDM, it _is_ the right place to explain, > seeing how its the only place.
It won't anymore in the next revision. -Andi
-- ak@linux.intel.com -- Speaking for myself only
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