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SubjectRe: [PATCH 3/3] x86, perf: Add PEBS frontend profiling for Skylake
On Fri, Jul 17, 2015 at 10:52:33PM +0200, Andi Kleen wrote:
>
> I don't think the code is the right place to document such registers.

If the code deviates from the SDM, it _is_ the right place to explain,
seeing how its the only place.


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