Messages in this thread |  | | Date | Fri, 17 Jul 2015 13:09:00 -0700 | | From | Andi Kleen <> | | Subject | Re: [PATCH 3/3] x86, perf: Add PEBS frontend profiling for Skylake |
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> I believe this mask of 0x3fff17 is wrong and should instead be > 0x7fffff based on the description of the FRONTEND > MSR I see in the SDM Table 18-54 (bit 0-22 are valid). Otherwise, some > valid latency values may be rejected.
No, my mask is correct.
-Andi
-- ak@linux.intel.com -- Speaking for myself only
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