lkml.org 
[lkml]   [2015]   [Jul]   [13]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH] x86, acpi: Handle xapic/x2apic entries in MADT
Hi Lukasz,

On 07/13/2015 09:54 PM, Lukasz Anaczkowski wrote:
> This patch is based on work of "Yinghai Lu <yinghai@kernel.org>"
> previously published at https://lkml.org/lkml/2013/1/21/563.
>
> In case when BIOS is populating MADT wiht both x2apic and local apic
> entries (as per ACPI spec), kernel builds it's processor table
> in the following order: BSP, X2APIC, local APIC, resulting in
> processors on the same core are not separated by core count.

I'm confused here, I can't figure out where is the problem, could you
explain it in detail?

For me, logical CPU IDs allocated by OS will have mappings to physical
CPU IDs, what you are saying seems CPU topology problem to me.

>
> This patch fixes this behavior and resulting assignment is
> correct.
>
> Signed-off-by: Lukasz Anaczkowski <lukasz.anaczkowski@intel.com>
> ---
> arch/x86/kernel/acpi/boot.c | 29 +++++++++++++-----
> drivers/acpi/numa.c | 28 ++++++++++++-----
> drivers/acpi/tables.c | 75 ++++++++++++++++++++++++++++-----------------
> drivers/irqchip/irq-gic.c | 15 ++++++---

Anyway, You also miss the SMP boot for ARM64 in ACPI way, which will
cause compile error on ARM64.

Thanks
Hanjun


\
 
 \ /
  Last update: 2015-07-13 17:41    [W:0.065 / U:0.264 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site