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    SubjectRe: [PATCH] x86, msr: Allow read access to /dev/cpu/X/msr
    On Wed, Jul 1, 2015 at 9:38 AM, Brown, Len <len.brown@intel.com> wrote:
    > BTW. I've had a discussion w/ LLNL about their needs,
    > both for security and performance. For security, as concluded
    > by this thread, a white list is the only way to go.
    > I'm thinking a bit-vector of allowed MSR offsets...
    > For performance, they absolutely can not afford a system call
    > for every single MSR access.

    I'm surprised. On a sane kernel, a syscall is about 120 cycles. Just
    rdmsr to an unoptimized MSR is probably fifty cycles, I'd guess.

    Of course, LLNL is probably using NOHZ_FULL, which is currently very,
    very slow. Work is afoot to fix that.

    > Here an ioctl to have the
    > msr driver perform a vector of accesses in a single system
    > call seems the way to go. I can prototype both of these
    > using turbostat as the customer.

    How about preadv?

    --Andy


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