Messages in this thread Patch in this message | | | From | Alan Tull <> | Subject | [PATCHv6 2/2] ARM: socfpga: dts: add sdram controller dt binding doc | Date | Tue, 2 Jun 2015 13:35:39 -0500 |
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Add binding doc for Altera SOCFPGA SDRAM controller.
Signed-off-by: Alan Tull <atull@opensource.altera.com> --- v4: Add bindings doc v5: No change for v5 v6: No change for v6 --- .../arm/altera/socfpga-sdram-controller.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt new file mode 100644 index 0000000..77ca635 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt @@ -0,0 +1,12 @@ +Altera SOCFPGA SDRAM Controller + +Required properties: +- compatible : Should contain "altr,sdr-ctl" and "syscon". + syscon is required by the Altera SOCFPGA SDRAM EDAC. +- reg : Should contain 1 register range (address and length) + +Example: + sdr: sdr@ffc25000 { + compatible = "altr,sdr-ctl", "syscon"; + reg = <0xffc25000 0x1000>; + }; -- 1.7.9.5
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