lkml.org 
[lkml]   [2015]   [Jun]   [2]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
SubjectRe: [PATCH v2 1/4] arch/*/asm/io.h: add ioremap_cache() to all architectures
From
On Tue, Jun 2, 2015 at 10:20 AM, Arnd Bergmann <arnd@arndb.de> wrote:
>> > --- a/arch/mn10300/include/asm/io.h
>> > +++ b/arch/mn10300/include/asm/io.h
>> > @@ -283,6 +283,7 @@ static inline void __iomem *ioremap_nocache(unsigned long offset, unsigned long
>> >
>> > #define ioremap_wc ioremap_nocache
>> > #define ioremap_wt ioremap_nocache
>> > +#define ioremap_cache ioremap_nocache
>>
>> From the comment in ioremap_nocache(), ioremap() may be cacheable in
>> this arch.
>
> Right, and I guess that would be a bug. ;-)
>
> mn10300 decides caching on the address, so presumably all arguments passed into

Aha, like MIPS...

> ioremap here already have that bit set. I've checked all the resource
> definitions for mn10300, and they are all between 0xA0000000 and 0xBFFFFFFF,
> which is non-cacheable.

But ioremap() clears that bit again:

static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
{
return (void __iomem *)(offset & ~0x20000000);
}

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds


\
 
 \ /
  Last update: 2015-06-02 11:21    [W:0.055 / U:17.820 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site