Messages in this thread | | | Subject | Re: [PATCH 1/2] clk: keystone: add support for post divider register for main pll | From | santosh shilimkar <> | Date | Thu, 18 Jun 2015 15:55:32 -0700 |
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On 6/18/2015 3:37 PM, Michael Turquette wrote: > Quoting Murali Karicheri (2015-05-29 09:04:12) >> Main PLL controller has post divider bits in a separate register in >> pll controller. Use the value from this register instead of fixed >> divider when available. >> >> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> > > Applied to clk-next. > Thanks Mike !!
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