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    Subject[PATCH 12/12] x86, pkeys: Documentation
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    Date


    ---

    b/Documentation/x86/protection-keys.txt | 22 ++++++++++++++++++++++
    1 file changed, 22 insertions(+)

    diff -puN /dev/null Documentation/x86/protection-keys.txt
    --- /dev/null 2015-05-06 22:34:35.845652580 -0700
    +++ b/Documentation/x86/protection-keys.txt 2015-05-07 10:31:45.360366611 -0700
    @@ -0,0 +1,22 @@
    +Memory Protection Keys for Userspace (PKU aka PKEYs) is a CPU
    +feature which will be found in future Intel CPUs. The work here
    +was done with the aid of simulators.
    +
    +Memory Protection Keys provides a mechanism for enforcing
    +page-based protections, but without requiring modification of the
    +page tables when an application changes protection domains. It
    +works by dedicating 4 previously ignored bits in each page table
    +entry to a “protection key”, giving 16 possible keys.
    +
    +There is also a new user-accessible register (PKRU) with two
    +separate bits (Access Disable and Write Disable) for each key.
    +Being a CPU register, PKRU is inherently thread-local,
    +potentially giving each thread a different set of protections
    +from every other thread.
    +
    +There are two new instructions (RDPKRU/WRPKRU) for reading and
    +writing to the new register. The feature is only available in
    +64-bit mode, even though there is theoretically space in the PAE
    +PTEs. These permissions are enforced on data access only and
    +have no effect on instruction fetches.
    +
    _

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