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    Subject[PATCH 3.19.y-ckt 34/92] ASoC: rt5677: fixed wrong DMIC ref clock
    Date
    3.19.8-ckt1 -stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Bard Liao <bardliao@realtek.com>

    commit 60a8d62b8497c23eb3d48149af7e55dac2dd83a2 upstream.

    DMIC clock source is not from codec system clock directly. it is
    generated from the division of system clock. And it should be 256 *
    sample rate of AIF1.

    Signed-off-by: Bard Liao <bardliao@realtek.com>
    Signed-off-by: Mark Brown <broonie@kernel.org>
    Signed-off-by: Kamal Mostafa <kamal@canonical.com>
    ---
    sound/soc/codecs/rt5677.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
    index 9ce6b65..1038d2d 100644
    --- a/sound/soc/codecs/rt5677.c
    +++ b/sound/soc/codecs/rt5677.c
    @@ -904,7 +904,7 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w,
    {
    struct snd_soc_codec *codec = w->codec;
    struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
    - int idx = rl6231_calc_dmic_clk(rt5677->sysclk);
    + int idx = rl6231_calc_dmic_clk(rt5677->lrck[RT5677_AIF1] << 8);

    if (idx < 0)
    dev_err(codec->dev, "Failed to set DMIC clock\n");
    --
    1.9.1


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