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SubjectRE: [PATCH v2 6/6] usb: chipidea: add work-around for Marvell HSIC PHY startup
Date

>
> On Wed, May 20, 2015 at 10:13 PM, Peter Chen <peter.chen@freescale.com>
> wrote:
> > On Tue, May 19, 2015 at 09:10:05PM -0500, Rob Herring wrote:
> >> The Marvell 28nm HSIC PHY requires the port to be forced to HS mode
> >> after the port power is applied. This is done using the test mode in
> >> the PORTSC register.
> >>
> >> As HSIC is always HS, this work-around should be safe to do with all
> >> HSIC PHYs. If not, a flag can also be added.
> >
> > I think a flag is needed, not sure all vendors can work well with that.
>
> Only i.MX6Sx uses HSIC in mainline. Is that something you can test? It would be
> better to not add flags unless they are really needed.
> Otherwise you end up with dozens of flags like SDHCI drivers have.
>

I will have a test for this, and show you the result later.

Peter
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