Messages in this thread | | | Date | Tue, 19 May 2015 10:17:55 +0100 | From | Matt Fleming <> | Subject | Re: [patch 4/6] x86, perf, cqm: Avoid pointless msr write |
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On Tue, 19 May, at 12:00:55AM, Thomas Gleixner wrote: > If the usage counter is non-zero there is no point to update the rmid > in the PQR MSR. > > Signed-off-by: Thomas Gleixner <tglx@linutronix.de> > --- > arch/x86/kernel/cpu/perf_event_intel_cqm.c | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-)
Good catch.
Acked-by: Matt Fleming <matt.fleming@intel.com>
-- Matt Fleming, Intel Open Source Technology Center
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