Messages in this thread Patch in this message | | | From | Andi Kleen <> | Subject | [PATCH 9/9] x86, perf: Move PMU ACK after LBR read | Date | Sun, 10 May 2015 12:22:47 -0700 |
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From: Andi Kleen <ak@linux.intel.com>
With Arch Perfmon v4 the PMU ack unfreezes the LBRs. So we need to do the PMU ack after the LBR reading, otherwise the LBRs would be polluted by the PMI handler.
This is a minimal change. In principle the ACK could be moved much later.
Signed-off-by: Andi Kleen <ak@linux.intel.com> --- arch/x86/kernel/cpu/perf_event_intel.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 2c8a268..a6de05e 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -1804,6 +1804,7 @@ static int intel_pmu_handle_irq(struct pt_regs *regs) loops = 0; again: + intel_pmu_lbr_read(); intel_pmu_ack_status(status); if (++loops > 100) { static bool warned = false; @@ -1818,7 +1819,6 @@ again: inc_irq_stat(apic_perf_irqs); - intel_pmu_lbr_read(); /* * Ignore a range of extra bits in status that do not indicate -- 1.9.3
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