Messages in this thread | | | Date | Tue, 28 Apr 2015 09:03:47 -0500 | From | Josh Cartwright <> | Subject | Re: [PATCH 1/3] mtd: nand: Add on-die ECC support |
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On Tue, Apr 28, 2015 at 09:14:26AM +0530, punnaiah choudary kalluri wrote: > On Tue, Apr 28, 2015 at 8:52 AM, Brian Norris <computersforpeace@gmail.com> wrote: > > On Tue, Apr 28, 2015 at 08:18:12AM +0530, punnaiah choudary kalluri wrote: > >> On Tue, Apr 28, 2015 at 4:53 AM, Brian Norris <computersforpeace@gmail.com> wrote: [..] > >> Agree that read_buf need not be returning raw data always including > >> my new driver for arasan nand flash controller. > > > > I agree with that. At the moment, chip->read_buf() really has very > > driver-specific meaning. Not sure if that's really a good thing, but > > it's the way things are... > > > >> http://lkml.iu.edu/hypermail/linux/kernel/1504.2/00313.html > > > > In the half a minute I just spent looking at this (I may review it > > properly later), I noted a few things: > > > > 1. you don't implement ecc.read_page_raw(); this means we'll probably > > have trouble supporting on-die ECC with your driver, among other things > > On-die ECC is optional as long as the controller has better ecc coverage. > The arasan controller supports up to 24 bit ecc. There is no point to use > on-die ECC and will always use hw ecc even for On-die ecc devices.
Maybe this is true of the controller instantiated in the Zynq MPSoC chips, but the Zynq 7000 series SMC is documented to support only 1-bit ECC.
(Which is why we're looking at your pl353 driver and this set).
Josh [unhandled content-type:application/pgp-signature] | |