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SubjectRE: [PATCH Bugfix 1/4] x86/xsave.c: Fix xstate offsets and sizes enumeration
Date
> From: Thomas Gleixner [mailto:tglx@linutronix.de]
> Sent: Tuesday, April 21, 2015 2:17 AM
> On Sat, 18 Apr 2015, Fenghua Yu wrote:
>
> > From: Fenghua Yu <fenghua.yu@intel.com>
> >
> > When enumerating xstate offsets and sizes from cpuid (eax=0x0d,
> > ecx>=2), it's possible that state m is not implemented while state n
> > (n>m) is implemented. So enumeration shouldn't stop at state m.
> >
> > There is no platform configured like above yet. But this could be a
> > problem in the future.
>
> So this is for future hardware. Why are you claiming this is a BUGFIX?

I think the current code does not follow xstate offsets and sizes
definition based on SDM. So it is buggy. When platforms have more
xsates, it's becoming more possible to hit the issue because platforms
have more chances to disable some xstates and leave holes in xsave
area. And I do see an internal platform may hit the issue. That's why I
claim this is a BUGFIX.

>
> This is a regular hardware enablement or are you saying that this is backport
> material?

I would like the patch to be backported to distros or stable kernel because
we may really see the issue in near future if it's not backported.

>
> Confused.

Thanks.

-Fenghua




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