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SubjectRe: [PATCH v2 07/12] devicetree: Add bindings for the ATH79 PLL controllers
Hi,

On Sun, Apr 19, 2015 at 2:58 PM, Alban Bedel <albeu@free.fr> wrote:
> Signed-off-by: Alban Bedel <albeu@free.fr>
> ---
> v2: * Fixed the node names to respect ePAPR
> * Fixed the missing 's' in 'fallbacks' and the 'clocks' property
> ---
> .../devicetree/bindings/clock/qca,ath79-pll.txt | 33 ++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qca,ath79-pll.txt
>
> diff --git a/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt b/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt
> new file mode 100644
> index 0000000..df3dbc8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt
> @@ -0,0 +1,33 @@
> +Binding for Qualcomm Atheros AR7xxx/AR9XXX PLL controller
> +
> +The PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB.
> +
> +Required Properties:
> +- compatible: has to be "qca,<soctype>-cpu-intc" and one of the following
> + fallbacks:
> + - "qca,ar7100-pll"
> + - "qca,ar7240-pll"
> + - "qca,ar9130-pll"
> + - "qca,ar9330-pll"
> + - "qca,ar9340-pll"
> + - "qca,ar9550-pll"

Shouldn't this be "qca,qca9550-pll"?


Jonas


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