Messages in this thread | | | Date | Thu, 16 Apr 2015 16:29:11 +1000 | From | David Gibson <> | Subject | Re: [PATCH kernel v8 18/31] powerpc/powernv/ioda2: Rework iommu_table creation |
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On Fri, Apr 10, 2015 at 04:31:00PM +1000, Alexey Kardashevskiy wrote: > This moves iommu_table creation to the beginning. This is a mechanical > patch. > > Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> > --- > arch/powerpc/platforms/powernv/pci-ioda.c | 34 ++++++++++++++++--------------- > 1 file changed, 18 insertions(+), 16 deletions(-) > > diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c > index 4d80502..a1e0df9 100644 > --- a/arch/powerpc/platforms/powernv/pci-ioda.c > +++ b/arch/powerpc/platforms/powernv/pci-ioda.c > @@ -1437,27 +1437,33 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, > addr = page_address(tce_mem); > memset(addr, 0, tce_table_size); > > + /* Setup iommu */ > + pe->table_group.tables[0].it_group = &pe->table_group; > + > + /* Setup linux iommu table */ > + tbl = &pe->table_group.tables[0]; > + pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0, > + IOMMU_PAGE_SHIFT_4K); > + > + tbl->it_ops = &pnv_ioda2_iommu_ops; > + iommu_init_table(tbl, phb->hose->node); > +#ifdef CONFIG_IOMMU_API > + pe->table_group.ops = &pnv_pci_ioda2_ops; > +#endif > + > /* > * Map TCE table through TVT. The TVE index is the PE number > * shifted by 1 bit for 32-bits DMA space. > */ > rc = opal_pci_map_pe_dma_window(phb->opal_id, pe->pe_number, > - pe->pe_number << 1, 1, __pa(addr), > - tce_table_size, 0x1000); > + pe->pe_number << 1, 1, __pa(tbl->it_base), > + tbl->it_size << 3, 1ULL << tbl->it_page_shift);
This looks like a real change, not just mechanical code movement.
> if (rc) { > pe_err(pe, "Failed to configure 32-bit TCE table," > " err %ld\n", rc); > goto fail; > } > > - /* Setup iommu */ > - pe->table_group.tables[0].it_group = &pe->table_group; > - > - /* Setup linux iommu table */ > - tbl = &pe->table_group.tables[0]; > - pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0, > - IOMMU_PAGE_SHIFT_4K); > - > /* OPAL variant of PHB3 invalidated TCEs */ > swinvp = of_get_property(phb->hose->dn, "ibm,opal-tce-kill", NULL); > if (swinvp) { > @@ -1471,16 +1477,12 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, > 8); > tbl->it_type |= (TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE); > } > - tbl->it_ops = &pnv_ioda2_iommu_ops; > - iommu_init_table(tbl, phb->hose->node); > -#ifdef CONFIG_IOMMU_API > - pe->table_group.ops = &pnv_pci_ioda2_ops; > -#endif > iommu_register_group(&pe->table_group, phb->hose->global_number, > pe->pe_number); > > if (pe->pdev) > - set_iommu_table_base_and_group(&pe->pdev->dev, tbl); > + set_iommu_table_base_and_group(&pe->pdev->dev, > + &pe->table_group.tables[0]);
And it's not obvious why this change happens either.
> else > pnv_ioda_setup_bus_dma(pe, pe->pbus, true); >
-- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson [unhandled content-type:application/pgp-signature] | |