lkml.org 
[lkml]   [2015]   [Apr]   [15]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
SubjectRE: [PATCH V6 3/6] perf, x86: large PEBS interrupt threshold
Date

>
> On Thu, Apr 09, 2015 at 12:37:43PM -0400, Kan Liang wrote:
> > @@ -280,8 +280,9 @@ static int alloc_pebs_buffer(int cpu)
> > ds->pebs_absolute_maximum = ds->pebs_buffer_base +
> > max * x86_pmu.pebs_record_size;
> >
> > - ds->pebs_interrupt_threshold = ds->pebs_buffer_base +
> > - thresh * x86_pmu.pebs_record_size;
> > + if (x86_pmu.intel_cap.pebs_format < 1)
> > + ds->pebs_interrupt_threshold = ds->pebs_buffer_base +
> > + x86_pmu.pebs_record_size;
> >
> > return 0;
> > }
>
> I can't seem to figure out what this is about.. help?

We move AUTO_RELOAD and large PEBS check to intel_pmu_hw_config.
But for earlier platform, it calls x86_pmu_hw_config.
So we force single PEBS record for old platform.



\
 
 \ /
  Last update: 2015-04-15 20:41    [W:0.093 / U:3.140 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site