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SubjectRe: [PATCH V6 3/6] perf, x86: large PEBS interrupt threshold
On Thu, Apr 09, 2015 at 12:37:43PM -0400, Kan Liang wrote:
> This patch also make AUTO_RELOAD conditional on large PEBS. Auto reload
> only be enabled when fix period and large PEBS.

What's a large PEBS?

> +++ b/arch/x86/kernel/cpu/perf_event.h
> @@ -87,6 +87,17 @@ struct amd_nb {
> #define MAX_PEBS_EVENTS 8
>
> /*
> + * Flags PEBS can handle without an PMI.
> + *
> + * TID can only be handled by flushing at context switch.
> + */
> +#define PEBS_FREERUNNING_FLAGS \
> + (PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR | \
> + PERF_SAMPLE_ID | PERF_SAMPLE_CPU | PERF_SAMPLE_STREAM_ID | \
> + PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER | \
> + PERF_SAMPLE_TRANSACTION)
> +
> +/*
> * A debug store configuration.
> *
> * We only support architectures that use 64bit fields.
> diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
> index 0a7b5ca..6c8579a 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel.c
> @@ -2306,7 +2306,9 @@ static int intel_pmu_hw_config(struct perf_event *event)
> return ret;
>
> if (event->attr.precise_ip) {
> - if (!event->attr.freq)
> + /* only enable auto reload when fix period and large PEBS */
> + if (!event->attr.freq &&
> + !(event->attr.sample_type & ~PEBS_FREERUNNING_FLAGS))
> event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD;
> if (x86_pmu.pebs_aliases)
> x86_pmu.pebs_aliases(event);

I suspect you meant the above change right?

But this negates part of the benefit of the auto reload; where
previously it saved an MSR write for pretty much all PEBS usage it now
becomes a burden for pretty much everyone.

Why cannot we retain the win for all PEBS users?


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