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SubjectRe: [GIT PULL] PMEM driver for v4.1
On Mon, Apr 13, 2015 at 12:45:32PM +0200, Ingo Molnar wrote:
> Btw., what's the future design plan here? Enable struct page backing,
> or provide special codepaths for all DAX uses like the special pte
> based approach for mmap()s?

There are a couple approaches proposed, but we don't have consensus which
way to go yet (to put it mildly).

- the old Intel patches just allocate pages for E820_PMEM regions.
I think this is a good way forward for the "old-school" small
pmem regions which usually are battery/capacitor + flash backed
DRAM anyway. This could easily be resurrected for the current code,
but it couldn't be used for PCI backed pmem regions, and would work
although waste a lot of resources for the gigantic pmem devices some
Intel people talk about (400TB+ IIRC).

- Intel has proposed changes that allow block I/O on regions that aren't
page backed, by supporting PFN-based scatterlists which would have to be
supported all over the I/O path. Reception of that code has been rather
mediocre in general, although I wouldn't rule it out.

- Boaz has shown code that creates pages dynamically for pmem regions.
Unlike the old Intel e820 code that would also work for PCI backed
pmem regions. Boaz says he has such a card, but until someone actually
publishes specs and/or the trivial pci_driver for them I'm inclined to
just ignore that option.

- There have been proposals for temporary struct page mappings, or
variable sized pages, but as far as I can tell no code to actually
implement these schemes.


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