Messages in this thread | | | Date | Thu, 26 Mar 2015 17:27:13 -0700 | Subject | Re: [PATCH 1/2] spi/rockchip: Round up clock rate divisor to err on the safe side | From | Doug Anderson <> |
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Julius,
On Thu, Mar 26, 2015 at 4:30 PM, Julius Werner <jwerner@chromium.org> wrote: > The Rockchip SPI driver currently calculates its clock rate divisor by > integer dividing the parent rate by the target rate, and then rounding > the result up to the next even number (since the divisor must be > even). > > Clock rate divisors should always be rounded up, so that the resulting > frequency is lower or equal to the target. This is correctly done in the > second step here but not in the first, so we still have a risk of > exceeding the desired target frequency (e.g. setting spi-max-frequency > to 40000000 with a parent clock of 99000000 could lead to a divisor of > 99000000 / 40000000 == 2 (which is even) that then results in an > effective frequency of 99000000 / 2 == 49500000 (potentially exceeding > the flash chip's specifications). > > This patch changes the division to round up to fix this problem. > > Signed-off-by: Julius Werner <jwerner@chromium.org> > --- > drivers/spi/spi-rockchip.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Doug Anderson <dianders@chromium.org>
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