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Subject[PATCH v4 0/3] iio: adc: vf610: respect ADC clocking limitations
Date
Respect ADC clocking limitations which lead to bogous reading on
500MHz clocked Vybrid SoC's. Additionally, also implement a
sysfs-property to configure the conversion mode available in this
ADC peripherial.

The clock limitations are specified using the device tree, hence
I seek an Ack from the device tree maintainers here...

Changes since v3:
- Move device tree bindings to driver changes

Changes since v2:
- Add sysfs ABI documentation
- Fix commit message spelling errors

Changes since v1:
- Use ext_info for conversion mode


Stefan Agner (3):
iio: adc: vf610: use ADC clock within specification
iio: adc: vf610: implement configurable conversion modes
ARM: dts: add property for maximum ADC clock frequencies

Documentation/ABI/testing/sysfs-bus-iio-vf610 | 7 +
.../devicetree/bindings/iio/adc/vf610-adc.txt | 9 +
arch/arm/boot/dts/vfxxx.dtsi | 4 +
drivers/iio/adc/vf610_adc.c | 225 +++++++++++++++------
4 files changed, 179 insertions(+), 66 deletions(-)
create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-vf610

--
2.3.3



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