lkml.org 
[lkml]   [2015]   [Mar]   [17]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH 1/5] USB: ehci-atmel: rework clk handling
On Tue, 17 Mar 2015, Boris Brezillon wrote:

> The EHCI IP only needs the UTMI/UPLL (uclk) and the peripheral (iclk)
> clocks to work properly. Remove the useless system clock (fclk).
>
> Avoid calling set_rate on the fixed rate UTMI/IPLL clock and remove
> useless IS_ENABLED(CONFIG_COMMON_CLK) tests (all at91 platforms have been
> moved to the CCF).
>
> This patch also fixes a bug introduced by 3440ef1 (ARM: at91/dt: fix USB
> high-speed clock to select UTMI), which was leaving the usb clock
> uninitialized and preventing the OHCI driver from setting the usb clock
> rate to 48MHz.
> This bug was caused by several things:
> 1/ usb clock drivers set the CLK_SET_RATE_GATE flag, which means the rate
> cannot be changed once the clock is prepared
> 2/ The EHCI driver was retrieving and preparing/enabling the uhpck
> clock which was in turn preparing its parent clock (the usb clock),
> thus preventing any rate change because of 1/
>
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>

Acked-by: Alan Stern <stern@rowland.harvard.edu>



\
 
 \ /
  Last update: 2015-03-17 20:21    [W:0.106 / U:0.096 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site