Messages in this thread | | | From | Tomeu Vizoso <> | Date | Thu, 12 Mar 2015 10:30:42 +0100 | Subject | Re: [PATCH v5 12/14] clk: tegra: Add EMC clock driver |
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On 5 January 2015 at 14:59, Thierry Reding <thierry.reding@gmail.com> wrote: > On Fri, Jan 02, 2015 at 06:27:50PM +0200, Peter De Schrijver wrote: >> On Tue, Nov 18, 2014 at 01:13:14PM +0100, Tomeu Vizoso wrote: >> > From: Mikko Perttunen <mperttunen@nvidia.com> >> > >> > The driver is currently only tested on Tegra124 Jetson TK1, but should >> > work with other Tegra124 boards, provided that correct EMC tables are >> > provided through the device tree. Older chip models have differing >> > timing change sequences, so they are not currently supported. >> > >> > Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> >> > Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> >> > >> > --- >> > >> > v5: * Get a pointer to the EMC driver at runtime, to be used when >> > calling the EMC API. >> > * Misc. style fixes >> > * Fix logic for rounding down to a high rate >> > >> > v4: * Adapt to changes in the OF bindings >> > * Improve error handling >> > * Fix comment style >> > * Make static a few more functions >> > >> > v3: * Add some locking to protect the registers that are shared with the MC >> > clock >> > >> > v2: * Make sure that the clock is properly registered >> > * Bail out early from attempts to set the same rate >> >> Thierry, >> >> How do you want to merge this series? The clock tree part depends on >> tegra_read_ram_code which is introduced earlier in this series. > > I guess the easiest would be to take this all into the Tegra tree. Apart > from patches 1, 12 and 14 everything would go via that anyway. I'll also > take some time this week to give the series some review, I don't think I > have looked at this code at all yet. > > Mike, you "looks good to me"'d patches 1, 12 and 14, does that translate > to an Acked-by?
Hi Mike,
apparently this is ready to go if you can give your Ack.
Thanks,
Tomeu
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