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    Subject[PATCH v7 07/18] of: document external-memory-controller property in tegra124-car
    Date
    This property contains a phandle to the EMC driver that is needed by the
    EMC clock to request the EMC driver to do its part of the clock change
    sequence.

    Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
    ---
    Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt | 2 ++
    1 file changed, 2 insertions(+)

    diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
    index c3891ce..7f02fb4 100644
    --- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
    +++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
    @@ -20,6 +20,7 @@ Required properties :
    - #reset-cells : Should be 1.
    In clock consumers, this cell represents the bit number in the CAR's
    array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
    +- nvidia,external-memory-controller : phandle of the EMC driver.

    The node should contain a "emc-timings" subnode for each supported RAM type (see
    field RAM_CODE in register PMC_STRAPPING_OPT_A).
    @@ -50,6 +51,7 @@ Example SoC include file:
    reg = <0x60006000 0x1000>;
    #clock-cells = <1>;
    #reset-cells = <1>;
    + nvidia,external-memory-controller = <&emc>;
    };

    usb@c5004000 {
    --
    2.1.0


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