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SubjectRe: [PATCH] clk: shmobile: div6: Avoid division by zero in .round_rate()
Hello.

On 2/5/2015 8:19 PM, Laurent Pinchart wrote:

>>>>>>> Anyone may call clk_round_rate() with a zero rate value, so we have to
>>>>>>> protect against that.

>>>>>>> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

>>>>>> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

>>>>>> I agree that this should not be fixed in the core because the fixup is
>>>>>> really driver dependant.

>>>>> Dunno, zero frequency seems generally insane to me.

>>>> It is useful to find the lowest frequency a clock can support. Basically
>>>> it is a search for the floor frequency.

>>> Why not just use 1? Or are you assuming that some hardware could actually
>>> support 0 Hz?

>> Replying to myself: yes, this has happened to me, when I forgot to override
>> the EXTAL frequency in the board .dts file (default was 0).

> So it was a good thing that the driver crashed, it let you find a bug ;-)

None of the clock drivers crashed, but the SDHI driver hanged instead, and
I spent much time tracing it in order to find where it hanged. :-/

WBR, Sergei



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